Annapurna K Y
Assistant Professor
- Teaching
About
Annapurna K Y obtained her B.E. in ECE from Bangalore University, M.Tech. in Electronics from Visvesvaraya Technological University, Belgaum and she is pursuing Ph.D at VTU, Belgaum. She has teaching experience of 12 years and Industry experience of 5 years. She is a member of IEEE . Her areas of interest are VLSI and Signal Processing .
Assistant professor, PESU, 2010 - Till date
Basic Electronics
Electronic Devices and Circuit Theory
Linear Integrated Circuits
Low Power VLSI
CMOS VLSI Design
Synthesis and Optimization of Digital Circuits
Network Analysis
Design of Analog CMOS Circuits
Design of Digital VLSI Circuits
FPGA Architectures and Applications.
Class Incharge
EWD Coordinator
Test Coordinator
Member of Exam coordination team(ECE Dept)
Class Committee Meeting Coordinator
PESU Academy coordinator
Hardware security
Lightweight Cryptography
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Significance-Driven Logic Compression for Energy Efficient Multiplier Design In Asian Journal of Convergence in Technology -2020 Volume: VI Issue: II
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" Implementation of 32-Bit Complex Floating Point Multiplication using Vedic multiplier,Array multiplier,CIFM multiplier using Verilog" in INOCON 2020.
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"Numerically Controlled Oscillator (NCO) Based Frequency Converter" in IJCA - 2014
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"High Performance Reconfigurable Routers for Power Optimization " at WiSE-2013, National Conference on Wireless Communication, Signal Processing, Embedded Systems
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"FPGA Implementation of Iterative Log Multiplier Using Operand Decomposition For Image Processing Application" in IJRASET - 2014.
Education
B.E, DSCE, 2000
M.Tech, BMSCE, 2010
Pursuing Ph.D, VTU