careers@pes.edu +91-8055524555
Electronics & Communications
RingRoadCampus
rekha.ss@pes.edu
+91-80-26721983

Rekha S S

Assistant Professor
Bio
Teaching
Responsibilities
Research
Publications

Obtained Electronics and Communication Engineering degree from Bangalore University. She has an M.Tech degree from RVCE, VTU in the area of VLSI Design and Embedded Systems. She is pursuing PhD in the area of Hardware Security.

Education

  • BE, Sri Siddhartha Institute of Technology 2000
  • Ph.D, PESU 2019- ongoing

Experience

  • Assistant Professor, PESU, 2014-Till date
  • Assistant Professor, PESIT, 2011-2014
  • Senior Lecturer, PESIT, 2008-2011
  • Lecturer, PESIT, 2000-2008
  • Basic Electronis
  • Analog electronics circuits
  • Digital Electronics
  • Electronics circuits -I
  • Electronics circuits -II
  • Linear Integrated circuits
  • VLIS Desing
  • Digatial system Design using VHDL
  • Advance VLSI and Design Methodolgies
  • Advance VLSI
  • CMOS VLSI Design
  • Propabality and Random Process
  • Reconfigurable computing
  • CMOS Analog circuit Design
  • Analog circuit Design
  • Digital VLSI Design
  • Department Co-Ordinator
  • NBA Co-Ordinator
  • TEQUIP Co-Ordinator
  • Student Co-Ordinator
  • Squad Member

Research Interest

  • Hardware Security

Research Projects (Current)

  • National conference : 01
  • Internationl conference: 04

Conferences

  • Rekha S. S. and Nagamani A. N. 2019. Hardware Security-present and Future Trends. In Proceedings of the 2019 2nd International Conference on Electronics and Electrical Engineering Technology (EEET 2019). Association for Computing Machinery, New York, NY, USA, 24-29. DOI:https://doi.org/10.1145/3362752.3362753
  • S. Nandi, S. Prasad, C. M. Ananda and S. S. Rekha, "Fixed point implementation of trigonometric function using Taylor's series and error characterization," 2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI), 2016, pp. 442-446, doi: 10.1109/ICACCI.2016.7732085.
  • S. S. Rekha, Y. J. Pavitra and P. Mishra, "FPGA implementation of scale invariant feature transform," 2016 International Conference on Microelectronics, Computing and Communications (MicroCom), 2016, pp. 1-7, doi: 10.1109/MicroCom.2016.7522483.
  • M. S. Suma and S. S. Rekha, "16B/20B CODEC Development and Its ASIC Implementation," 2009 International Conference on Future Computer and Communication, 2009, pp. 622-626, doi: 10.1109/ICFCC.2009.23.