Qualified UGC NET- 2015, 2016 Qualified GATE- 2013,2015
Digital Electronics
Signals and Systems
Basics of Electronic Devices and Circuits
Analog Communication Electronics
Digital Switching and Logic Design
Time Table coordinator
Class co-ordinator (2 times)
Research Interest
VLSI and Embedded Systems
Conferences
2. Low power adiabatic 4-Bit Johnson counter based on power-gating CPAL logic, 2016 Second International Innovative Applications of Computational Intelligence on Power, Energy and Controls with their Impact on Humanity (CIPECH).
1. 4*4 Bit Multiplier using Adiabatic 2XOR and sleep mode transistor logic, published in : 2015 International Conference on Signal Processing, Computing and Control (ISPCC).
