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Dr. Shashidhar Tantry

Professor
Bio
Teaching
Responsibilities
Research
Publications

Dr Shashidhar Tantry is working as Professor since 2016. He has over 17 years of Industry experience, worked is companies like Sanyo LSI, Wipro, KPIT Cummins and Sankalp semiconductors and Aplab. He has over 30 publications in journals and conferences. His area of interest is Analog VLSI, device modelling, circuit optimization, biomedical signal processing and sensor interface. He is senior member IEEE and advisor to IEEE Solid State circuits student chapter.

Education

  • B. E., P D A College of Engineering 1992
  • M. E., Shizuoka University, Japan 2000
  • Ph. D., Shizuoka University, Japan 2003

Experience

  • Professor, PES University, October 2018-Till Date
  • Professor, PES Institute of Technology, Bangalore South, February 2016-September 2018
  • Senior Practice Manager, Sankalp semiconductors, June 2010-January 2016
  • Senior Specialist, Wipro Limited, July 2007-June 2010
  • Senior Manager, KPIT Cummins Infosystems limited, April 2006-July 2007
  • Program Manager, Sanyo LSI Technology India Pvt Ltd, July 2003-March 2006
  • Senior Engineer, Aplab Limited, January 1994-September 1997

Achivements

  • Best performance award in Wipro Ltd 2008
  • Best team performance award in Sanyo LSI in 2005
  • Best paper award for my student at RISE 2017 conference
  • Holds Japanese Language Proficiency Certificate
  • Guided students for higher studies in Shizuoka University, Japan
  • VLSI domain skill enhancement
  • IEEE Solid State Circuits Society mentor for PESIT student branch

Conferences

  • 1. Rachita Angadi, Shashidhar Tantry ?Realisation of gyrator circuit and its application demonstration on cadence tool? IEEE Conference on Innovation in Technology, 2020
  • 2. Madiha Makandar, Shashidhar Tantry ?A positive negative floating resistor with current as controlling parameter? IEEE CONECCT 2020
  • 3. Lokesh L, Sanket S N, Shashidhar Tantry ? Denoise Modelling of ECG signals for Analog Front End? 7th conference on computing for sustainable global development
  • 4. Shashidhar Tantry, Lokesh L, Abhishek D. Bhargav Ram, ? 6th symposium towards the future of advanced research in Shizuoka University 2020
  • 5. Sagar B H, Vishal N A, Vinay K S, Shashidhar Tantry ?Detection on noise in ECG signal using Analog Behavioral modeling for readout circuits? presentation at 4th international conference on biomedical imaging and signal processing, Nagoya, 2019, Japan
  • 6. J Shyam Sai Pavankumar, Shashidhar Tantry , Lokesh.L ? Combined modelling of MEMSCapacitive Accelerometer And Readout Circuit? NOLTA 2019, Malaysia
  • 7. Sagar B H and Vinay K S, Shashidhar Tantry ?An Unified EKV MOSFET Model to Achieve Better Performance of Practical MOS Circuits? 2019 Global Conference on Advancement in Technology
  • 8. Sunitha M S, Rakshitha B S, Sankeerthana K, Shashidhar Tantry ?High effecifiency fast response buck converter for low voltage application? PrimeAsia 2019, Bangkok
  • 9. Akhila Punaroor, Shashidhar Tantry ?A delay adjustable power on reset circuit? International Conference on Electrical, Communication, Electronics, Instrumentation and Computing (ICECEIC)
  • 10. Nelson G, Suhas P, Rajeshwar H, Rishita V and Shashidhar Tantry ?Performance comparison of comparators used in SAR ADCs for ultra low power biomedical applications? 3rd International Conference on New Frontiers of Engineering, Science, Management and Humanities 201
  • 11. Dhanashree Bhate, Shashidhar Tantry, Jayant G, Naveeen Kumar A ?Implementation of DC motor speed control logic on FPGA?, IEEE International Conference for Convergence in Technology 2018.

Journals

  • 12. Pankaja H C, Shashidhar Tantry, ?Design and analysis of CMOS based temperature sensor?, International Journal of scientific research in science and technology, Vol.5, Issue 3, May-June 2018, page 191-196.
  • 13. Pankaja H C, Shashidhar Tantry, ?Design and analysis of CMOS based temperature sensor?, Conference on Recent Innovations in Science and Engineering 2018
  • 14. Shashidhar Tantry, Sharanu Devakki, ?A Current controlled floating resistor?, Asain Journal of Convergence and Technology, Vol. 4 Issue 2
  • 15. Rohan Srinath, Prasannapatil G N, Venkatesh Pampana, Prathiksha Shetty S, Dr.Shashidhar Tantry ?A Capacitive sensor readout circuit with low power mode operations? IEEE International Conference on Microelectronic Devices and Systems, 2017
  • 16. Sharanu Devakki and Shashidhar Tantry ?A positive negative floating resistor circuit with control voltage on high impedance? International Conference on Energy, Communication, Data Analytics and Soft Computing 2017
  • 17. Sharanu Devakki and Shashidhar Tantry ?An improved Bilateral floating resistor circuit with positive and negative resistance? Conference on Recent Innovations in Science and Engineering 2017
  • 18. Kruthika Simha, Shreya, Chetan Kumar, Parinitha, Shashidhar Tantry, ?Electronic Notice Board with multiple output display? International Conference on Signal Processing, Communication, Power and Embedded Systems 2016
  • 19. Mathew George, P Cyril Prasanna Raj, T.J.Martin, M. Tim, Shashidhar Tantry ?Modelling, Design and Implementation of a 2.4 GHz Low-Noise CMOS VCO for ISM Band Applications? SASTech Journal Vol.8 Issue 1
  • 20. V Acharya, S Kakde, S Tantry, H Koyama, ?Design and implementation of Class AB CMOS power amplifier using GSMC 0.15u Technology? Proceedings, VDAT 2005
  • 21. S Tantry, Y Hiraku, T Oura, T Yoneyama, H Asai, ?A low voltage floating resistor circuit having both positive and negative resistance values? IEICE Transactions on Fundamentals, Vol E86A, No.2, Feb 2003
  • 22. S Tantry, T Oura, T Yoneyama, H Asai, ?A low voltage floating resistor circuit having both positive and negative resistance values? Proceedings, Asia Pacific Conference on Circuits and Systems, 2002
  • 23. T Oura, T Yoneyama, S Tantry, H Asai, ?A Positive Negative Resistor for Synaptic Weights? Japanese Journal, Denshi Kairo Kenkyukai ECT, 2002
  • 24. T Oura, T Yoneyama, S Tantry, H Asai, ?A CMOS floating resistor having both positive and negative resistance values? IEICE Transactions on Fundamentals, Vol E85A, No.2, Feb 2002
  • 25. T Oura, T Yoneyama, S Tantry, H Asai, ?Threshold independent floating resistor circuit exhibiting both positive and negative resistance values? Proceedings, IEEE international symposium on circuits and systems, 2002, pp 739-742
  • 26. S Tantry, T Yoneyama, H Asai, ?Two floating resistor circuits and their applications to synaptic weights in analog neural networks? Proceedings, IEEE international symposium on circuits and systems, 2001 (ISCAS 2001)
  • 27. S Tantry, T Yoneyama, H Asai, ?A structure to realise various kinds of floating resistors? Shizuoka University, Department of Electronics and material science, Research report, 2002
  • 28. S Tantry, T Oura, T Yoneyama, H Asai, ?A floating resistor with positive and negative values operating at lower supply voltages? Proceedings, ITC-CSCC, 2002
  • 29. S Tantry, T Oura, T Yoneyama, H Asai, ?A Positive Floating Resistor and A Negative Floating Resistor for the Analog Neural Network Implementation? Japanese Journal, Denshi Kairo Kenkyukai ECT, 2000
  • 30. S Tantry, ?floating resistors as synaptic weights in analog neural networks? Proceedings, NOLTA, 1999