Research Areas
1Research Interest
- VLSI Design , Motor Control , FPGA
Publications
2Conferences
- Dhanashree Bhate ; Shashidhar Tantry; Jayanth Gopinath; Kumara A. Naveen �Implementation of DC Motor Speed Control Logic on FPGA�,2018 3rd International Conference for Convergence in Technology (I2CT), Year: 2018, Conference Paper, Publisher: IEEE
- Enhanced Human Presence Detection in Restricted Zones Using mmWave Technology and Deep Learning First Online: 31 October 2025 pp 512–522 Cite this conference paper https://link.springer.com/chapter/10.1007/978-3-032-06691-6_48
Teaching
8Education
3-
M. Tech ( VLSI Design & Embedded Systems)B.M.S. College of Engineering , Bangalore2010
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B.E. (EEE)Gogte Institute of Technology , Belgaum ( Karnatak University Dharwad)2001
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Ph.D ( Persuing)PES Institute of Technology Bangalore ( VTU research center)
Experience
3-
Assistant ProfessorPES InstitutionsAugust 2006 – Till Today 2026
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LecturerDayanand Sagar College of Engineering , Bangalore2005 – 2006
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Trainee EngineerIndian Institute of Astrophysics Bangalore2001 – 2005
Achievements
2- B.E. 1st Rank to college (G.I.T Belgaum), 4th Rank Karnatak University Dharwad
- Distinction Holder
Responsibilities
3- Mentoring Coordinator for department
- Placement Coordinator
- Alumni Coordinator
Campus
EC Campus