• 1. Digital Design Using HDL (Theory and Lab)

• 2. Microprocessors (Theory and Lab)

• 3. Embedded Systems (Theory and lab)

• 4. Digital VLSI Design (Theory and Lab)

• 5. Verification of VLSI Circuits using System Verilog (Theory)

• 6. Testing of VLSI Circuits (Theory)

• 1. Anchor For Testing of VLSI Circuits

• 2. Anchor for Verification of VLSI Circuits

• 3. Students Mentor

• 1. VLSI Design 2. Embedded systems

• Ph.D (pursuing), PESU R&D Centre, Chips.

• A Pipelined Fused Processing Unit for DSP Applications, in the national conference on research challenges in wireless communication systems and VLSI design 2014, held at PSG College of Technology.

• Design of Peak Cancellation Crest Factor Reduction Algorithm, in the national conference on VLSI, Communication and Wireless Technologies 2013, held at PSG College of Technology.

• MICRO-ARCHETECTURE DESIGN OF RISC V MICROPROCESSOR USING VHDL, International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084 Volume-5, Issue-6, Jun-2017

• VHDL IMPLEMENTATION OF BIJECTIVE/REVERSABLE FULL SUBTRACTOR AND COMPARATOR USING TR GATE, International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2393-2835 Volume-5, Issue-6, Jun-2017