Dr. Srinivasa V S Sarma D

VLSI Design and Embedded Systems, IoT

D. S. V. S. Sarma and K. K. Mahapatra, “Improved techniques for high performance noise-tolerant domino cmos logic circuits,” in 2012 Students Conference on Engineering and Systems, 2012, pp. 1–6.

Ananthraj Rao Kekuda, Anirudh G P, Ashwin Thomas and Srinivasa V S Sarma, "Design and Analysis of Energy Efficient ASCON 80PQ", 2026 14th International Symposium on Digital Forensics and Security-2026 (ISDFS-2026), Boston, Massachusetts, USA, March 19-20, 2026.

Arya Jain, Anirudh Kulkarni, Ankushkumar Yemekar, Arjun Rao K and Srinivasa V S Sarma D, "ML-DRIVEN ROW-HAMMER ATTACK DETECTION AND IMPACT MITIGATION FOR RISC-V ARCHITECTURE", 2026 10th IEEE International Conference on Advanced Systems and Emergent Technologies (IC_ASET 2026), Hammamet-Tunisia, Nabeul, Tunisia, March 26-28, 2026.

Rohith K, Yash M, Vineet P T, Ishwar H and Srinivasa V S Sarma D, "Implementation of an Asynchronous Dual-Core RISC-V Processor with Dynamically Shared Floating-Point Unit", 2026 15th IEEE International Conference on Communications, Circuits and Systems (ICCCAS_2026), Takasaki, Gunma, Japan, July 7-10, 2026.

Sushant Ravi Naik, Vijith Maneeram, Tushar S Prabhu, Sudeendra Kumar K and Srinivasa V S Sarma D, "A Novel Digitally Triggered Analog Trojan in Low Drop-out Regulators", 2026 15th IEEE International Conference on Communications, Circuits and Systems (ICCCAS_2026), Takasaki, Gunma, Japan, July 7-10, 2026.